This tech-note is intended for existing users of the ADSP- 218x, who are familiar with the architecture and instruction set of the ADSP-218x, and plan to upgrade their design to the ADSP-219x.
This document serves as a technical guide for engineers upgrading their designs from the ADSP-218x DSP family to the ADSP-219x. It details the architectural enhancements in the ADSP-219x, such as the unified memory space, 16-bit DAG registers, and increased addressing flexibility. The note aims to minimize intrusive changes to the instruction set while improving C-friendliness and efficiency.
This document is intended for existing users of the ADSP-218x who plan to upgrade their design to the ADSP-219x.
Jumps, calls and returns can take up to 4 DSP clock cycles if the branch is taken.
The SR register has been expanded to 40 bits on the ADSP-219x.