Introduces how two DSP cores of Analog Devices' ADSP-2192 DSP chip can communicate with each other directly with DSP-to-DSP semaphores and interrupts or indirectly with shared memory.
This document is an Engineer-to-Engineer Note (EE-129) from Analog Devices regarding the ADSP-2192 digital signal processor. It details the functionality of interprocessor communication between the two DSP cores, covering both direct methods using semaphores and interrupts, and indirect methods using shared memory.
| Architecture | Dual 219x cores |
|---|---|
| Internal Memory | 140K words |
| Shared Memory Size | 4K x 16-bit |
| Shared Memory Address | 0x020000 |
| Shared Memory Latency | Minimum 2 cycles |
They communicate directly with DSP-to-DSP semaphores and interrupts.
They communicate indirectly using shared memory.
The priority is fixed at DSP0, then DSP1.