Analog Devices Implementing In-Place FFTs on SISD SIMD SHARC Processors Application Note

This document is a technical note on using ADSP-21065L and ADSP-21161 processors. It discusses the implementation of in-place FFTs and provides ASM code examples.


Analog Devices Implementing In-Place FFTs on SISD SIMD SHARC Processors Application Note - cover page
Brand
Analog Devices
Document type
Application Note
Language
English
Pages
4
File format
PDF
File size
33 KB
Published
03 August, 2012
Updated
30 September, 2023
MD5 checksum
95B347E9BB3D7EB6A6C50AAD7FB4C09A

About this manual

The document provides technical guidance for engineers on implementing in-place FFTs, which require no additional buffer memory, making them suitable for memory-constrained systems. It covers both SISD (ADSP-21065L) and SIMD (ADSP-21161) architectures.

What's inside

  • Introduction
  • DIT vs. DIF FFT Routines
  • Unscrambling the Results
  • Approach 1: Sequential Traversal
  • Approach 2: Decision Table
  • Approach 3: Look-up Table
  • Performance Analysis
  • Appendix Code List

Frequently asked questions

What is an in-place FFT?

An in-place FFT is calculated entirely inside its original sample memory, requiring no additional buffer memory.

Which SHARC processors are covered?

The note covers the ADSP-21065L (SISD) and ADSP-21161 (SIMD) processors.

Which FFT algorithm is used in the examples?

The provided example code uses a radix-2 DIF (decimation-in-frequency) FFT algorithm.

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