This document is a technical note about how to use the ADSP-21262 SHARC® EZ-KIT Lite™ board and the EZ-KIT Extender card to connect to high-end converter evaluation boards
This document is an Engineer-to-Engineer Note (EE-222) detailing the use of the Parallel Data Acquisition Port (PDAP) on the ADSP-21262 SHARC DSP and the EZ-KIT Extender card. It specifically describes the physical connection and configuration required to interface an ADSP-21262 EZ-KIT Lite board with high-speed converter evaluation boards, using the AD9244-EB as a representative example.
The project utilizes an ADSP-21262 EZ-KIT Lite board, a SHARC EZ-KIT Extender card, an AD9244 High-Speed Converter Evaluation Board, and the VisualDSP++ 3.0 SP1 development environment. The text covers the hardware interface configuration for the AD9244 and explains how the PDAP peripheral connects to the ADC via the extender card.
| Core instruction rate | 200 MHz (5ns) |
|---|---|
| Processing power | 1200 MFLOPs |
| On-chip SRAM | up to 2 Mbits |
| On-chip ROM | 4 Mbits |
| Parallel Port throughput | 66 MB/s |
| ADC Resolution | 14-bit |
| ADC Sample Rate | 65 MSPS |
| ADC Power Dissipation | 590 mW |
The project was implemented using the VisualDSP++ 3.0 SP1 development environment.
General-purpose DSP solutions typically cost less and have much shorter design cycles, allowing for faster time to market.
The output drivers can be configured to interface with 5-V or 3.3-V logic families by setting the DRVDD jumper to 5V or 3.3V, respectively.