Motorola MPC2104P/MPC2105P Secondary Cache Module Datasheet

MOTOROLA FAST SRAM is a 256KB/512KB BurstRAM secondary cache module specifically designed for the PowerPC 60x microprocessor family in compliance with the PowerPC Reference Platform (PReP) and the PowerPC Common Hardware Reference Platform (CHRP) specifications.


Motorola MPC2104P/MPC2105P Secondary Cache Module Datasheet - cover page
Brand
Motorola
Category
Memory
Document type
Datasheet
Language
English
Pages
16
File format
PDF
File size
163 KB
Published
12 July, 2012
Updated
30 September, 2023
Model
MPC2104
MD5 checksum
63A36E5D0C15B6E2C72A1A7EAE848349

About this manual

This document provides technical data for the MPC2104P and MPC2105P, which are 256KB and 512KB BurstRAM secondary cache modules designed for PowerPC PReP and CHRP platforms. These modules utilize synchronous BurstRAMs to provide high-performance L2 cache for the PowerPC 60x microprocessor family.

What's inside

  • Product Preview
  • Block Diagram
  • Pin Assignment
  • Pin Descriptions
  • Truth Table
  • Burst Address Table

Specifications

Capacity (MPC2104P)256KB
Capacity (MPC2105P)512KB
Configuration (MPC2104P)32K x 64 bits
Configuration (MPC2105P)64K x 64 bits
Package Type178 pin DIMM
Max Clock Rate66 MHz
Data RAM Access Time8 ns
Tag RAM Access Time9 ns

Frequently asked questions

What are the stated access times for the tag and data RAMs?

The tag RAM has a match access time of 9 ns, and the data RAM has an access time of 8 ns.

What is the maximum clock rate supported by the module?

The module supports fast clock rates of up to 66 MHz.

What voltage supplies must be connected to the module?

Both the +5 V and +3.3 V power supplies must be connected to the module.

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