MOTOROLA MPC2105A MPC2106A MPC2105B MPC2106B Manual

This is the MPC2105A/B and MPC2106A/B Fast SRAM 512KB and 1MB BurstRAM Secondary Cache Modules for PowerPC PReP/CHRP Platforms.


MOTOROLA MPC2105A MPC2106A MPC2105B MPC2106B Manual - cover page
Brand
Motorola
Category
Memory
Document type
Datasheet
Language
English
Pages
20
File format
PDF
File size
251 KB
Published
12 July, 2012
Updated
30 September, 2023
MD5 checksum
8E830CB69A33E41C74AC0D71F19F9E12

About this manual

This document provides technical data for the MPC2105A/B and MPC2106A/B BurstRAM secondary cache modules. These modules are designed to provide high-performance L2 cache for the PowerPC 60x microprocessor family, conforming to PowerPC Reference Platform (PReP) and Common Hardware Reference Platform (CHRP) specifications. The modules utilize synchronous BurstRAMs configured as 64K x 72 and 128K x 72 bits in a 178-pin DIMM format.

What's inside

  • Product Description
  • Features
  • Block Diagram
  • Pin Assignment
  • Pin Descriptions
  • Truth Tables
  • Absolute Maximum Ratings
  • Operating Conditions

Specifications

Memory Configuration64K x 72, and 128K x 72 bits
Package Format178 (89 x 2) pin DIMM
Clock RateUp to 66 MHz
SRAM Access Time (Tag)10ns
SRAM Access Time (Data)9ns
Operating Temperature0 to +70 °C
Storage Temperature-55 to + 125 °C

Frequently asked questions

What platforms are these cache modules designed for?

They are designed for PowerPC 60x microprocessor family in conformance with PReP and CHRP specifications.

What voltage supplies are required?

Both +5 V (Vcc) and +3.3 V (Vpp) power supplies must be connected.

Are the modules compatible with each other?

Yes, all cache modules in this family are plug and pin compatible.

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