This document describes the features and characteristics of the 74HC/HCT237, which is a 3-to-8 line decoder/demultiplexer with address latches. It can be used for easy expansion or independent controls, and has features such as high speed, standard output capability, and low power consumption.
The Philips 74HC/HCT237 is a high-speed Si-gate CMOS device that combines a 3-to-8 decoder with a 3-bit latch. It is pin compatible with low power Schottky TTL (LSTTL) and is specified in compliance with JEDEC standard no. 7A. The device features multiple input enable for easy expansion or independent controls and provides active HIGH mutually exclusive outputs.
| Logic Category | MSI |
|---|---|
| Output Capability | standard |
| Propagation Delay (An to Yn) | 16 ns (typical) |
| Propagation Delay (LE to Yn) | 19 ns (typical) |
| Propagation Delay (E; to Yn) | 14 ns (typical) |
| Input Capacitance | 3.5 pF |
| Power Dissipation Capacitance | 60 pF (HC) |
It is a 3-to-8 line decoder/demultiplexer with latches at the three address inputs.
When LE is LOW, the device acts as a 3-to-8 active LOW decoder. When LE goes from LOW-to-HIGH, the last data present at the inputs is stored in the latches.
The output enable input (E; and E2) controls the state of the outputs independent of the address inputs or latch operation.