The 5497 is a synchronous 6-stage binary counter that outputs a pulse rate at a sub-multiple of the input frequency. The output pulse rate relative to the clock frequency is determined by signals applied to the Select (S0-S5) inputs. Both true and complement outputs are available, along with an enable input for each. A Count Enable input and a Terminal Count output are provided for cascading two or more packages. An asynchronous Master Reset input prevents counting and resets the counter.
The 5497/DM7497 is a synchronous modulo-64 bit rate multiplier containing a 6-stage binary counter and three six-decoding gates. It gates the clock through to the output at a sub-multiple of the input frequency, with the output pulse rate determined by signals applied to the Select (S0-S5) inputs. Both true and complement outputs are available, along with an enable input for each.
| Supply Voltage | 4.5V to 5.5V |
|---|---|
| Operating Temperature (5497) | -55°C to +125°C |
| Operating Temperature (DM7497) | 0°C to +70°C |
| Maximum Clock Frequency | 25 MHz |
| Package Type | 16-Lead Ceramic Dual-In-Line Package |
The maximum clock frequency is 25 MHz.
The supply voltage range is 4.5V to 5.5V.
The device contains a 6-stage binary counter.