This document describes part number-specific changes to recommended operating conditions and revised electrical specifications, as applicable, from those described in the general MPC7410 Hardware Specifications (Document No. MPC7410EC)
This document describes specific revisions to the general MPC7410 Hardware Specifications, focusing on voltage settings, power consumption, and operating conditions for various part numbers in the MPC7410xxnnnNE Series. It details changes such as reduced core voltages to achieve lower power consumption and the removal of 3.3V OVdd support for certain variants.
The addendum covers specific features including selectable bus interface voltages (1.8 V or 2.5 V), input threshold voltage settings relative to supply pins, and recommended operating conditions for core and PLL supplies. It also lists power consumption figures for different modes such as Full-On, Doze, Nap, and Sleep.
| Core supply voltage (Vdd) | 1.5V ± 50mV |
|---|---|
| PLL supply voltage (AVdd) | 1.5V ± 50mV |
| Die-junction temperature (Tj) | 0 to 105 °C |
| Processor bus supply voltage (BVSEL = 0) | 1.8V ± 100mV |
| Processor bus supply voltage (BVSEL = HRESET) | 2.5V ± 100mV |
The document supports selectable interface voltages of 1.8 V and 2.5 V; 3.3 V is not supported.
No, it does not support the default OVdd setting of 3.3 V.