Toshiba TC55V8512J/FT-12,-15 CMOS SRAM Datasheet

The TC55V8512J/FT is a high-speed static random access memory (SRAM) with 4,194,304 bits, organized as 524,288 words by 8 bits. It is fabricated using CMOS technology and advanced circuit techniques to provide high-speed operation. It is well suited for cache memory applications where high-speed access and high-speed storage are required.


Toshiba TC55V8512J/FT-12,-15 CMOS SRAM Datasheet - cover page
Brand
Toshiba
Category
Memory
Document type
Datasheet
Language
English
Pages
10
File format
PDF
File size
152 KB
Published
08 June, 2012
Updated
28 September, 2023
MD5 checksum
41991095B27BACD159B29CC3BA641026

About this manual

The document details the specifications for the TC55V8512J/FT-12 and TC55V8512J/FT-15 models of CMOS Static Random Access Memory (SRAM). These devices are organized as 524,288 words by 8 bits and operate from a single 3.3 V power supply. They feature fast access times of 12 ns or 15 ns maximum and are available in 36-pin SOJ and 44-pin TSOP packages.

What's inside

  • Description
  • Features
  • Pin Assignment
  • Maximum Ratings
  • DC Characteristics
  • AC Characteristics
  • Timing Diagrams
  • Package Dimensions

Specifications

Memory Organization524,288 words x 8 bits
Power Supply Voltage3.3 V +0.3 V
Access Time (Model -12)12 ns max
Access Time (Model -15)15 ns max
Operating Temperature Range-10 to 85 °C

Frequently asked questions

What is the access time for the TC55V8512J/FT-12?

The maximum access time for the TC55V8512J/FT-12 model is 12 ns.

Is this device compatible with LVTTL logic levels?

Yes, all inputs and outputs are directly LVTTL compatible.

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