Lattice ispLSI 1032E High Density PLD Handbook

ispLSI 1032E is a high-density programmable logic device (PLD) that features 6000 PLD gates, 64 I/O pins, and 192 registers and supports up to 125 MHz maximum operating frequency. It is based on high-performance E2CMOS technology and features TTL-compatible inputs and outputs and can be programmed in-system with 5V power.


Lattice ispLSI 1032E High Density PLD Handbook - cover page
Brand
Lattice
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
17
File format
PDF
File size
296 KB
Published
12 April, 2012
Updated
30 September, 2023
MD5 checksum
9ED460CB7411569AE8F3E73DE9B0E155

About this manual

The ispLSI 1032E is a high‑density programmable logic device featuring 6000 PLD gates, 64 universal I/O pins, eight dedicated inputs, and four dedicated clock pins. It offers 5 V non‑volatile in‑system programmability, TTL‑compatible I/O, and selectable output slew rates for low noise operation.

The document lists absolute maximum ratings, recommended operating conditions, detailed timing parameters, data retention specs, and ordering information for commercial and industrial speed grades, including lead‑free package options.

What's inside

  • Functional Block Diagram
  • Absolute Maximum Ratings
  • DC Recommended Operating Conditions
  • Data Retention Specifications
  • Switching Test Conditions
  • External Timing Parameters
  • Internal Timing Parameters
  • Ordering Information
  • Revision History

Specifications

Logic Gates6000 PLD gates
I/O Pins64 universal I/O pins, 8 dedicated inputs
Maximum Operating Frequency125 MHz
Propagation Delay7.5 ns
Data Retention20 years
Erase/Reprogram Cycles410 000 cycles

Frequently asked questions

What is the maximum operating frequency of the ispLSI 1032E?

The device can operate up to 125 MHz.

How many I/O pins does the ispLSI 1032E provide?

It provides 64 universal I/O pins plus eight dedicated input pins.

What is the data retention time for the ispLSI 1032E?

Data is retained for 20 years.

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