Hitachi HD6321/HD6821 Datasheet


Hitachi HD6321/HD6821 Datasheet - cover page
Brand
Hitachi
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
25
File format
PDF
File size
948 KB
Published
05 June, 2012
Updated
04 June, 2012
MD5 checksum
3ADFB83A17863C15DA7B73E5E236A926

About this manual

The HD6321/HD6821 Peripheral Interface Adapter (PIA) from Hitachi offers two 8‑bit bi‑directional data buses and four programmable control lines, allowing flexible interfacing of peripheral devices to a microprocessing unit. The device operates from a 5 V supply (±10%) and is available in CMOS and NMOS versions.

The document includes sections on features, absolute maximum ratings, recommended operating conditions, pin arrangement, block diagram, DC and AC electrical characteristics, peripheral and bus timing diagrams, programming summaries, and a compatibility note between the CMOS and NMOS versions.

What's inside

  • Features
  • Absolute Maximum Ratings
  • Recommended Operating Conditions
  • Pin Arrangement
  • Block Diagram
  • Electrical Characteristics
  • DC Characteristics
  • AC Characteristics
  • Peripheral Timing
  • Bus Timing

Specifications

Maximum Output Current (per pin)10 mA

Frequently asked questions

What is the maximum output current per I/O pin?

Each output pin can source or sink up to 10 mA.

Is the HD6321 compatible with the NMOS PIA HD6821?

Yes, the HD6321 CMOS version is compatible with the NMOS PIA HD6821.

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