This product is a NPN resistor-equipped transistor with built-in bias resistors R1 and R2. It can simplify circuit design, reduce the number of components and required PCB area. It is especially suitable for space reduction in interface and driver circuits and can be used for inverter circuit configuration without use of external resistors.
The PDTC115EE is an NPN transistor with built‑in bias resistors (R1 and R2, each 100 kΩ) designed to simplify circuit design and reduce component count. It is supplied in a plastic SOT416 (SC‑75) surface‑mount package with three leads.
The device is suitable for space‑constrained interface and driver circuits, including inverter configurations that do not require external resistors. Key electrical ratings include a 50 V collector‑emitter voltage and a 20 mA continuous output current.
| Collector‑emitter voltage (VcEo) | 50 V |
|---|---|
| Output current (DC) | 20 mA |
| Bias resistor R1 | 100 kΩ |
| Bias resistor R2 | 100 kΩ |
| Package type | SOT416 (SC‑75) |
| Storage temperature range | -65 °C to +150 °C |
| Maximum junction temperature | 150 °C |
The device is rated for a maximum collector‑emitter voltage of 50 V.
It is supplied in a plastic SOT416 (SC‑75) surface‑mount package with three leads.
The transistor includes two built‑in bias resistors, R1 and R2, each typically 100 kΩ.
The device can handle a continuous output current of 20 mA.