The MCM40200 and MCM40L200 are 2 M × 40‑bit dynamic RAM (DRAM) SIMM modules designed for error‑correction applications. Each module is a double‑sided 72‑lead single‑in‑line memory module containing twenty 1 M × 4 DRAM chips and decoupling capacitors.
The datasheet provides absolute maximum ratings, recommended operating conditions, detailed timing parameters for read/write cycles, refresh mechanisms, pin assignments, and mechanical dimensions. Ordering information and part‑number variants for standard and gold‑pad SIMM packages are also included.
| Memory organization | 2,097,152 × 40 bits |
|---|---|
| Package type | 72‑lead single‑in‑line memory module (SIMM) |
| Maximum refresh time (MCM40200) | 16 ms (max) |
| Maximum refresh time (MCM40L200) | 128 ms (max) |
| Access time (MCM40200‑80) | 80 ns (max) |
| Power dissipation (MCM40200‑80) | 5.89 W (max) |
| TTL‑level power consumption | 220 mW (max) |
| Supply voltage (operating range) | 5.0 V ± 10 % |
| Operating temperature range | 0 °C to 70 °C |
| Input capacitance (A0‑AQ) | 410 pF |
The maximum refresh time for the MCM40200 is 16 ms.
Both modules use a 72‑lead single‑in‑line memory module (SIMM) package.
The recommended supply voltage is 5.0 V ± 10 % and the operating temperature range is 0 °C to 70 °C.
Each module contains twenty 1 M × 4 DRAM chips.