M68AF127B is a 128K x 8-bit SRAM with OUTPUT ENABLE, supply voltage of 4.5 to 5.5V, equal cycle and access times of 55ns, low standby current, low VCC data retention voltage of 2V, TRI-STATE COMMON I/O, and low active and standby power.
The M68AF127B SRAM provides 1 Mbit of static memory organized as 131,072 words × 8 bits. It operates from a single 4.5 V to 5.5 V supply and features fully static operation with equal address, cycle and access times. An automatic power‑down mode reduces consumption by over 99 % when the device is deselected.
The device is offered in SO32, PDIP32, TSOP32 (8 × 13.4 mm) and TSOP32 (8 × 20 mm) packages. Detailed electrical characteristics, maximum ratings, and timing diagrams are provided for both read and write operations.
| Supply Voltage | 4.5 V to 5.5 V |
|---|---|
| Output Current (Io) | 20 mA |
| Ambient Operating Temperature (Ta) | -55 °C to 125 °C |
| Storage Temperature (TsTG) | -65 °C to 150 °C |
| Power Dissipation (Pp) | 1 W |
It operates from a single supply voltage between 4.5 V and 5.5 V.
When the device is deselected, it automatically enters a standby mode that reduces power consumption by over 99 %.
The SRAM is offered in SO32, PDIP32, TSOP32 (8 × 13.4 mm) and TSOP32 (8 × 20 mm) packages.