This document describes the features and characteristics of the Hitachi 16-bit single-chip microcomputer H8S series, including the revision date of the H8S/2678 Group, H8S/2678R Group, H8S/2676 F-ZTAT Hardware Manual, general precautions on handling the product, and treatment of unused input pins.
This hardware manual describes the features, functional modules, registers, and electrical characteristics of the Renesas H8S/2678 Group microcontrollers. It is intended for designers who integrate the LSI into application systems and includes detailed notes on pin usage, peripheral functions, and configuration guidelines.
The document also provides revision history, pin function tables, and reference information for related programming manuals and development tools, helping users to correctly implement the device in their designs.
| CPU architecture | 16‑bit single‑chip microcomputer (H8S/2600 core) |
|---|---|
| Address space | 16‑Mbyte linear address space |
| DMA controller | Direct Memory Access controller (DMAC and EXDMAC) |
| Data Transfer Controller | DTC bus master |
| Watchdog timer | WDT |
| Serial interfaces | SCI and IrDA |
| A/D converter | 10‑bit |
| D/A converter | 8‑bit |
No. NC pins should not be connected because they are either not connected internally or used as test pins, and connecting them may cause the LSI to malfunction.
All unused input pins must be fixed to a defined high or low level to prevent noise‑induced intermediate states.
The F‑ZTAT version provides a reprogrammable flash memory that can be updated quickly during mass production and later stages.