This document is a preliminary datasheet for the dsPIC30F4011/4012 high-performance digital signal controllers from Microchip Technology Inc. The document describes the features and characteristics of the product.
The dsPIC30F4011/4012 is a 16‑bit digital signal controller with a modified Harvard architecture, up to 30 MIPS performance, and a range of integrated peripherals for motor control and signal processing. The datasheet summarizes the device’s CPU, memory, analog, and communication features.
Key sections include device overview, CPU architecture, memory organization, peripheral modules (timers, PWM, QEI, SPI, I²C, UART, CAN, ADC), electrical characteristics, and packaging information, along with pin diagrams for multiple package types.
| Flash program memory | 48 KB (16 K instruction words) |
|---|---|
| Data RAM | 2 KB |
| Data EEPROM | 1 KB |
| Maximum performance | Up to 30 MIPS |
| External clock input | DC to 40 MHz |
| I/O pin current capability | 25 mA sink / 25 mA source |
| ADC resolution | 10‑bit |
| PWM output channels | 6 |
The device can operate up to 30 MIPS with a DC to 40 MHz external clock input.
It includes 48 KB of on‑chip Flash program space (16 K instruction words).
The controller provides six PWM output channels.
A 10‑bit analog‑to‑digital converter is integrated.