Intersil ISL9000A Dual LDO Datasheet

The ISL9000A is a high-performance dual LDO that can source 300mA current from each output. It has a low standby current and very high PSRR, and is stable with output capacitance of 1µF to 10µF with ESR of up to 200mΩ. The device integrates an individual Power-On-Reset (POR) function for each output. The POR delay for VO2 can be externally programmed by connecting a timing capacitor to the CPOR pin. The POR delay for VO1 is internally fixed at approximately 2ms. A reference bypass pin is also provided for connecting a noise filtering capacitor for low noise and high-PSRR applications. The quiescent current is typically only 42µA with both LDO’s enabled and active. Separate enable pins control each individual LDO output. When both enable pins are low, the device is in shutdown, typically drawing less than 0.1µA. Several combinations of voltage outputs are standard. Output voltage options for each LDO range from 1.5V to 3.3V. Other output voltage options may be available upon request.


Intersil ISL9000A Dual LDO Datasheet - cover page
Brand
Intersil
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
12
File format
PDF
File size
227 KB
Published
28 March, 2012
Updated
29 September, 2023
MD5 checksum
74E0373BE8676A7310A6191D51CE2868

About this manual

The ISL9000A is a high‑performance dual low‑dropout (LDO) regulator capable of delivering up to 300 mA per output. It offers low standby current, very high power‑supply rejection (PSRR), and low output noise, making it suitable for noise‑sensitive portable devices.

Key features include separate enable and POR pins for each LDO, programmable output voltages from 1.5 V to 3.3 V, soft‑start circuitry, and built‑in current‑limit and over‑heat protection. The device is offered in a 10‑lead 3 mm × 3 mm DFN package and is RoHS compliant.

What's inside

  • Features
  • Applications
  • Ordering Information
  • Absolute Maximum Ratings
  • Recommended Operating Conditions
  • Electrical Specifications
  • Device Start‑up Characteristics
  • Typical Performance Curves
  • Dual Flat No‑Lead Plastic Package (DFN)
  • Reference Generation

Specifications

Maximum Output Current per LDO300 mA
Quiescent Current (both LDOs enabled)42 µA
Dropout Voltage (typical)200 mV @ 300 mA
PSRR90 dB @ 1 kHz
Output Noise30 µV rms @ 100 µA (1.5 V)
Input Voltage Range2.3 V to 6.5 V
Operating Temperature Range-40 °C to +85 °C
Package10‑lead 3 mm × 3 mm DFN

Frequently asked questions

What is the quiescent current when both LDOs are active?

The typical quiescent current is 42 µA with both LDOs enabled.

How can the POR delay for VO2 be programmed?

By connecting a timing capacitor to the CPOR pin; the VO1 POR delay is fixed at about 2 ms.

What is the maximum output current per channel?

Each LDO can source up to 300 mA continuously.

What protection features does the ISL9000A include?

It provides short‑circuit protection limiting output current to about 475 mA, over‑heat detection, and current‑limit circuitry.

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