This document describes a high-performance system with speeds up to 100 MHz, array multipliers over 50 MHz, and flexible 10 ns SRAM. It also provides FreeRAM™, a flexible single/dual port synchronous/asynchronous 10 ns SRAM with 2,048 to 18,432 bits of distributed SRAM independent of logic cells. Additionally, the system features 128 to 384 PCI compliant I/Os, 8 global clocks, and pin-compatible package options. The system supports Cache Logic® dynamic full/partial re-configurability in-system, enabling unlimited re-programmability and fast design changes.