The M74HC51 is a high-speed CMOS dual 2-wide 2-input AND/OR invert gate fabricated with silicon gate C2MOS technology. It contains a 2-wide 2-input AND/OR invert gate and a 2-wide 3-input AND/OR invert gate. The internal circuit is composed of 3 stages (2 input) or 5 stages (3 input) including buffer output, which enables high noise immunity and stable output. All inputs are equipped with protection circuits against static discharge and transient excess voltage.
M74HC4543 is a high speed CMOS BCD-TO-7 SEGMENT DECODER WITH LCD DRIVER. It features high speed, low power dissipation, high noise immunity, symmetrical output impedance, balanced propagation delays and wide operating voltage range. The device consists of BCD-TO-7 segment decoder with a BCD input latch and a 7-segment driver for a liquid crystal display (LCD). When any illegal BCD input signal is applied or input BI is held high, the display is blanked. When driving LCDs, a common square wave signal should be applied not only to the PH input of this device but also to the electrically common backplane of the display. For other types of readouts, such as light-emitting diode (LED), some additional drivers, such as a transistor array is required. All inputs are equipped with protection circuits against static discharge and transient excess voltage.
The M74HC4538 is a high speed CMOS monostable multivibrator fabricated with silicon gate C2MOS technology. Each multivibrator features both a negative A, and a positive B, edge triggered input, either of which can be used as an inhibit input. Also included is a clear input that when taken low resets the one shot. The monostable multivibrators are retriggerable. That is, they may be triggered repeatedly while their outputs are generating a pulse and the pulse will be extended. Pulse width stability over a wide range of temperature and supply is achieved using linear CMOS techniques. The output pulse equation is simply: PW = 0.7 (R)(C) where PW is in seconds, R in Omhs and C is in Farads. All the inputs are equipped with protection circuits against static discharge and transient excess voltage.
M74HC4518 is a high-speed CMOS DUAL BINARY COUNTER fabricated with silicon gate C2MOS technology. It consist of two identical internally synchronous 4-stage counters.
M74HC4316 is a CMOS QUAD BILATERAL SWITCH fabricated with silicon gate C2MOS technology. This device has four independent analogue switches. Each switch has two input/output terminals (nI/O, nO/I) and an active high select input (nC).
M74HC4094 is an 8 bit SIPO shift register with 3 state output buffer that can be used as shift register or latch. It features high speed, low power dissipation and high noise immunity.
M74HC4078 is a high-speed CMOS 8-input NOR/OR gate fabricated with silicon gate C2MOS technology. It features high speed, low power dissipation, high noise immunity, symmetrical output impedance, balanced propagation delays, and wide operating voltage range.
This document describes the features and characteristics of the M74HC4075, a high-speed CMOS triple 3-input OR gate. It features high speed, low power dissipation, high noise immunity, and stable output. All inputs are equipped with protection circuits against static discharge and transient excess voltage.
M74HC4066 is an high speed CMOS QUAD BILATERAL SWITCH fabricated with silicon gate C2MOS technology. The C input is provided to control the switch; the switch is on when the C input is held high and off when C is held low.
The M74HC4060 is a 14-stage binary counter/oscillator fabricated with silicon gate C2MOS technology. It has high speed, low power consumption, high noise immunity, symmetrical output impedance, balanced propagation delay, and wide operating voltage range. The oscillator configuration allows design of either RC or crystal oscillator circuits. A high level on the CLEAR accomplishes the reset function, i.e. all counter outputs are made low and the oscillator is disabled. A negative transition on the clock input increments the counter. Ten kinds of divided output are provided; 4 to 10 and 12 to 14 stage inclusive. The maximum division available at Q12 is 1/16384 f oscillator. The Ø1 input and the CLEAR input are equipped with protection circuits against static discharge and transient excess voltage.
The M74HC4051 is a single 8-channel analog multiplexer/demultiplexer with low power dissipation, logic level translation, low on resistance, wide analog input voltage range, fast switching, low crosstalk between switches, high on/off output voltage ratio, wide operating supply voltage range, low sine wave distortion, high noise immunity, etc.
The M74HC4049 is a high-speed CMOS Hex Buffer (Inverting) fabricated with silicon gate C2MOS technology. The internal circuit is composed of 2 stage inverters, which enables high noise immunity and a stable output. Input protection circuits are different from those of the high speed CMOS IC's. The Vcc side diodes are designed to allow logic-level conversion from high-level voltages (up to 13V) to low level voltages.
M74HC4024 is a high speed CMOS 7 STAGE BINARY COUNTER with low power dissipation, high noise immunity, symmetrical output impedance, balanced propagation delays and wide operating voltage range
This document describes the features and functions of the M74HC4020 high-speed CMOS 14-stage binary counter. The counter features high speed, low power dissipation, high noise immunity, symmetrical output impedance, balanced propagation delays, and a wide operating voltage range.
The M74HC4017 is a high speed CMOS decade counter/divider fabricated with silicon gate C2MOS technology. The M74HC4017 is a 5-stage Johnson counter with 10 decoded outputs. Each of the decoded outputs is normally low and sequentially goes high on the low to high transition of the clock input. Each output stays high for one clock period of the 10 clock period cycle. The CARRY output goes low to high after OUTPUT 10 goes low, and can be used in conjunction with the CLOCK ENABLE (CKEN)to cascade several stages. The CLOCK ENABLE input disables counting when in the high state. A CLEAR (CLR) input is also provided which when taken high sets all the decoded outputs low. All inputs are equipped with protection circuits against static discharge and transient excess voltage.