74V1G14 is a CMOS SINGLE SCHMITT INVERTER with features of high speed, low power dissipation, high noise immunity, stable output, and can be used for 5V to 3V interface.
The document describes a CMOS single bilateral switch that features high speed performance, low power consumption, high noise immunity, and low on-resistance. The switch is suitable for a wide operating range from 2V to 12V.
The document describes the features and characteristics of the 74V1G125 single bus buffer, including high speed performance, low power dissipation, high noise immunity, power down protection on inputs, symmetrical output impedance, etc.
74V1G08 is a high-performance, low-power, high noise immunity, wide voltage range CMOS single 2-input AND gate. The chip adopts advanced C2MOS process, with 2-stage buffer output, high impedance output, strong current output capacity. At the same time, input pull-down resistors are provided, which can work normally under various power supply voltages.
This document describes the features and characteristics of the 74V1G02 single 2-input NOR gate, including high speed, low power dissipation, high noise immunity, power down protection on inputs, and balanced propagation delays. The gate is suitable for interfacing 5V to 3V.
The 74LVX245 is a low voltage CMOS OCTAL BUS BUFFER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power, battery operated and low noise 3.3V applications.
The 74LCX16245 is a low voltage CMOS 16 bit bus transceiver (3-state) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and high speed 3.3V applications; it can be interfaced to 5V signal environment for both inputs and outputs. This IC is intended for two-way asynchronous communication between data buses; the direction of data transmission is determined by DIR input. The two enable inputs nG can be used to disable the device so that the buses are effectively isolated. It has same speed performance at 3.3V than 5V AC/ACT family, combined with a lower power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. All floating bus terminals during High Z State must be held HIGH or LOW.
The 74LCX573 is a low voltage CMOS octal D-type latch with 3-state non-inverting output fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and high speed 3.3V applications; it can be interfaced to 5V signal environment for both inputs and outputs. These 8 bit D-Type latch are controlled by a latch enable input (LE) and an output enable input (OE). While the LE inputs is held at a high level, the Q outputs will follow the data input. When the LE is taken low, the Q outputs will be latched at the logic level of D input data. While the (OE) input is low, the 8 outputs will be in a normal logic state (high or low logic level) and while (OE) is in high level, the outputs will be in a high impedance state. It has same speed performance at 3.3V than 5V AC/ACT family, combined with a lower power consumption. All inputs and outputs are equipped with protection circuits against static discharge.
74LCX374 is a low voltage CMOS octal D-type non-inverting flip-flop fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and high speed 3.3V applications; it can be interfaced to 5V signal environment for both inputs and outputs. These 8 bit D-Type flip-flops are controlled by a clock input (CK) and an output enable input (OE). On the positive transition of the clock, the Q outputs will be set to the logic state that were setup at the D inputs. While the (OE) input is low, the 8 outputs will be in a normal logic state (high or low logic level) and while high level the outputs will be in a high impedance state. The Output control does not affect the internal operation of flip flops; that is, the old data can be retained or the new data can be entered even while the outputs are off. It has same speed performance at 3.3V than 5V AC/ACT family, combined with a lower power consumption and higher compatibility.
This document provides information on the 74LCX125 low-voltage CMOS quad bus buffer. The product features 5V tolerant inputs and outputs, high-speed response, low power consumption, and is suitable for automotive, industrial, computer, and consumer applications.
74LCX74 is a low voltage CMOS dual D-type flip flop with preset and clear non inverting fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and high speed 3.3V applications; it can be interfaced to 5V signal environment for inputs. A signal on the D INPUT is transferred to the Q OUTPUT during the positive going transition of the clock pulse. CLR and PR are independent of the clock and accomplished by a low setting on the appropriate input. It has same speed performance at 3.3V than 5V AC/ACT family, combined with a lower power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
This document describes the features and characteristics of the 74LCX86 low voltage CMOS quad Exclusive OR gate with 5V tolerant inputs. It features high speed operation, power down protection on inputs and outputs, symmetrical output impedance, balanced propagation delays, and compatibility with 74 series 86. It is designed for low power and high speed 3.3V applications and can be used in a 5V signal environment.
