STMicroelectronics Manuals - Page 67

ManualLib has 6,003 STMicroelectronics manuals, in categories such as Anti-Theft Devices, Electronic Original. Every file can be read online or downloaded as a PDF for free.

STMicroelectronics manuals, page 67

  • ST M74HC4017 handbook

    The M74HC4017 is a high speed CMOS decade counter/divider fabricated with silicon gate C2MOS technology. The M74HC4017 is a 5-stage Johnson counter with 10 decoded outputs. Each of the decoded outputs is normally low and sequentially goes high on the low to high transition of the clock input. Each output stays high for one clock period of the 10 clock period cycle. The CARRY output goes low to high after OUTPUT 10 goes low, and can be used in conjunction with the CLOCK ENABLE (CKEN)to cascade several stages. The CLOCK ENABLE input disables counting when in the high state. A CLEAR (CLR) input is also provided which when taken high sets all the decoded outputs low. All inputs are equipped with protection circuits against static discharge and transient excess voltage.

  • ST M74HC4016 handbook

    M74HC4016 is a high-speed CMOS quad bilateral switch fabricated with silicon gate C2MOS technology. The C input is provided to control the switch; the switch is on when the C input is held high and off when C is held low.

  • ST M74HC393 handbook

    The document introduces the M74HC393, a high-speed CMOS dual binary counter with features such as high speed, low power dissipation, high noise immunity, and symmetrical output impedance. The counter circuit contains independent ripple carry counters and two 4-bit ripple carry binary counters, which can be cascaded to create a single divide by 256 counter. Each 4-bit counter is incremented on the high to low transition (negative edge) of the clock input, and each has an independent clear input. When CLEAR is set to low, all four bits of each counter are set to a low level. This enables count truncation and allows the implementation of divide by N counter configurations. All inputs are equipped with protection circuits against static discharge and transient excess voltage.

  • ST M74HC390 handbook

    The M74HC390 dual decade counter features high speed, low power dissipation, high noise immunity, balanced propagation delays and wide operating voltage range.

  • ST M74HC377 handbook

    The document describes the features and characteristics of the M74HC377 high-speed CMOS octal D-type flip-flop. The product features high speed, low power dissipation, high noise immunity, symmetrical output impedance, balanced propagation delays, and a wide operating voltage range.

  • ST M74HC374 handbook

    This document describes the features and characteristics of the M74HC374 high-speed CMOS octal D-type flip-flop. It features high speed, low power dissipation, high noise immunity, symmetrical output impedance, balanced propagation delays, and wide operating voltage range.

  • ST M74HC373 handbook

    M74HC373 is a high-performance CMOS eight-bit D-type latch with 3-state outputs. It works with a voltage range of 2V to 6V, and the output current IOH and IOL is 6mA, and the input voltage VNIH and VNIL is 28% VCC.

  • ST M74HC367 handbook

    The M74HC367 is a high-speed CMOS HEX BUS BUFFER with 3-state outputs fabricated with silicon gate C2MOS technology. This device contains six buffers, four buffers are controlled by an enable input (G1) and the other two buffers are controlled by the other enable input (G2); the outputs of each buffer group are enabled when G1 and/or G2 inputs are held low, and when held high, these outputs are disabled in a high-impedance state. All inputs are equipped with protection circuits against static discharge and transient excess voltage.

  • ST M74HC365 handbook

    The 74HC365 is an advanced high-speed CMOS HEX BUS BUFFER (3-STATE) fabricated with silicon gate C2MOS technology. All six buffers are controlled by the combination of two enable inputs (G1 and G2); all outputs of these buffers are enabled only when both G1 and G2 inputs are held low, under all other conditions these outputs are disabled in a high-impedance state. The M74HC365 has non inverting outputs. All inputs are equipped with protection circuits against static discharge and transient excess voltage.

  • ST M74HC32 handbook

    The M74HC32 is a high-speed CMOS quad 2-input OR gate fabricated with silicon gate C2MOS technology. The internal circuit is composed of 2 stages including buffer output, which enables high noise immunity and stable output. All inputs are equipped with protection circuits against static discharge and transient excess voltage.

  • ST M74HC299 handbook

    The M74HC299 is an high speed CMOS 8 BIT PIPO SHIFT REGISTER (3-STATE) fabricated with silicon gate C2MOS technology. This device has four modes (HOLD, SHIFT LEFT, SHIFT RIGHT and LOAD DATA). Each mode is chosen by two function select inputs (S0, S1). When one or both enable inputs, (G1, G2) are high, the eight input/output terminals are in the high impedance state; however sequential operation or clearing of the register is not affected. Clear function on the M74HC299 is asynchronous to CLOCK. All inputs are equipped with protection circuits against static discharge and transient excess voltage.

  • ST M74HC283 handbook

    M74HC283 is a 4-bit binary full adder with full internal look-ahead. A 4 x n binary adder is easily built up by cascading without any additional logic.

  • ST M74HC280 handbook

    M74HC280 9-BIT PARITY GENERATOR is a high speed CMOS 9-BIT PARITY GENERATOR fabricated with silicon gate C2MOS technology.

  • ST M74HC273 handbook

    The M74HC273 is a high speed CMOS OCTAL D TYPE FLIP FLOP WITH CLEAR fabricated with silicon gate C2MOS technology. Information signals applied to D inputs are transferred to the Q outputs on the positive-going edge of the clock pulse. When the CLEAR input is held low, the Q output are in the low logic level independent of the other inputs. All inputs are equipped with protection circuits against static discharge and transient excess voltage.

  • ST M74HC27 handbook

    The M74HC27 is a high speed CMOS triple 3-input NOR gate fabricated with silicon gate C2MOS technology. The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output. All inputs are equipped with protection circuits against static discharge and transient excess voltage.