M74HC73 is a CMOS DUAL J-K FLIP FLOP WITH CLEAR with high speed, low power consumption, high noise immunity, symmetrical output impedance, balanced propagation delay and wide operating voltage range
The M74HC73 is a high-speed CMOS dual J-K flip-flop with preset and clear from STMicroelectronics. It is fabricated with silicon gate C2MOS technology and changes state on the negative-going transition of the clock input; the clear function operates independently of the clock when CLR is taken low.
The datasheet covers pin connections and IEC logic symbols, a truth table and logic diagram, absolute maximum ratings, recommended operating conditions, DC and AC electrical characteristics, test circuits and waveforms, and mechanical data for the DIP-14, SO-14 and TSSOP14 packages.
| Supply Voltage (Operating) | 2 V to 6 V |
|---|---|
| Maximum Clock Frequency | 80 MHz typ. at VCC = 6 V |
| Quiescent Supply Current | 2 µA max. at TA = 25 °C |
| DC Output Current | ±25 mA |
| Operating Temperature | -55 to 125 °C |
| Packages | DIP, SOP, TSSOP |
The recommended operating supply voltage range is 2 V to 6 V.
The M74HC73 has a typical maximum clock frequency of 80 MHz at VCC = 6 V.
The clear function occurs independently of the clock when the CLR input is taken low.
The order codes list DIP, SOP and TSSOP package options.