MAXIM Manuals

The MAX3984 is a single-channel, preemphasis driver with input equalization that operates from 1Gbps to 10.3Gbps. It provides compensation for copper links, such as 8.5Gbps Fibre Channel and 10.3Gbps Ethernet, allowing spans of up to 10m with 24 AWG cable.

The MAX3845 is a TMDS® 2-to-4 fanout switch and cable driver for multimonitor distribution of DVI™ or HDMI™ signaling up to 1.65Gbps. Both inputs and outputs are standard TMDS signaling as per DVI and HDMI standards. Four DVI/HDMI TMDS outputs are provided for fanout distribution. Each TMDS output can be independently sourced from either input or can be turned off. Each TMDS input or output is composed of four differential channels that can be arbitrarily assigned to the three data signals and the 1/10th-rate clock. The data rate depends on resolution, but it can vary from 250Mbps (VGA) to 1.65Gbps (UXGA or 1080p/60). Typical applications include multiroom display of the same video source or industrial/commercial signage applications such as airport monitors or trading room floor displays. The MAX3845 includes selectable output preemphasis that extends output cable reach up to an additional 7m. For DDC switching, use the companion MAX4814E 2:4 low-resistance CMOS crosspoint switch. DDC switching is not required for applications that connect DDC to one reference monitor only. The MAX3845 can be configured to create a 2 x 8 or 4 x 4 switch (see the Typical Operating Circuit diagrams).

This datasheet introduces MAX3987, a 4-channel receive and transmit equalizer (EQ) that compensates for transmission medium losses encountered with FR4 stripline/microstrip and/or high-speed cable. The device can be used at the beginning, middle, or end of a channel. The input equalization requires no setting, and the output preemphasis (PE) is programmable. Through an I2C serial interface, the preemphasis level, output drive level, output polarity, and powering down of unused outputs are programmable for each channel. It can also be configured globally through pins. The device operates from a 2.5V or 3.3V supply, and is packaged in a 7mm x 7mm, 48-pin TQFN.

The MAX9157 is a quad bus LVDS (BLVDS) transceiver for heavily loaded, half-duplex multipoint buses.

maxim 9111/9113 is a single/dual lvds receiver that supports 500mbps switching rates, complies with tia/eia-644 standard, and has low 300ps(max) pulse skew, which can be used for high-resolution imaging applications

MAX9110/MAX9112 is a low-power, low-EMI, high-resolution image application single/dual channel LVDS transmitter supporting 500Mbps high-speed data transmission.

The MAX9123 is a quad low-voltage differential signaling (LVDS) differential line driver from Maxim. The device guarantees data transmission at speeds up to 800Mbps (400MHz) over controlled impedance media of approximately 100Ω. The transmission media may be printed circuit (PC) board traces, backplanes, or cables. The MAX9123 accepts four LVTTL/LVCMOS input levels and translates them to LVDS output signals. Furthermore, the MAX9123 is able to set all four outputs to a high-impedance state through two enable inputs, EN and EN, thus dropping the device to an ultra-low-power state of 16mW (typ) during high impedance. The enables are common to all four transmitters. Outputs conform to the ANSI TIA/EIA-644 LVDS standard. Flow-through pinout simplifies PC board layout and reduces crosstalk by separating the LVTTL/LVCMOS inputs and LVDS outputs. The MAX9123 operates from a single +3.3V supply and is specified for operation from -40°C to +85°C. It is available in 16-pin TSSOP and SO packages. Please refer to the MAX9121/ MAX9122* data sheet for quad LVDS line receivers with integrated termination and flow-through pinout.

The MAX9115 is a low-voltage differential signaling (LVDS) line receiver ideal for applications requiring high data rates, low power, and low noise. The device is guaranteed to receive data at speeds up to 200Mbps (100MHz). The MAX9115 accepts an LVDS differential input and translates it to an LVTTL/LVCMOS output. The fail-safe feature sets the output high when the inputs are undriv- en and open, terminated, or shorted. The device sup- ports a wide common-mode input range, allowing a ground potential difference and common-mode noise between the driver and the receiver. The MAX9115 conforms to the ANSI TIA/EIA-644 LVDS standard. The MAX9115 operates from a single +3.3V supply, and is specified for operation from -40°C to +85°C. It is available in a space-saving 5-pin SC70 package. Refer to the MAX9110/MAX9112 data sheet for single/dual LVDS line drivers.

The MAX9124 is a quad low-voltage differential signaling (LVDS) line driver ideal for applications requiring high data rates, low power, and low noise. The MAX9124 is guaranteed to transmit data at speeds up to 800Mbps (400MHz) over controlled impedance media of approximately 100Ω. The transmission media may be printed circuit (PC) board traces, backplanes, or cables. The MAX9124 accepts four LVTTL/LVCMOS input levels and translates them to LVDS output signals. Moreover, the MAX9124 is capable of setting all four outputs to a high-impedance state through two enable inputs, EN and EN, thus dropping the device to an ultra-low-power state of 16mW (typ) during high impedance. The enables are common to all four transmitters. Outputs conform to the ANSI TIA/EIA-644 LVDS standard. The MAX9124 operates from a single +3.3V supply and is specified for operation from -40°C to +85°C. It is available in 16-pin TSSOP and SO packages. Refer to the MAX9125/ MAX9126 data sheet for quad LVDS line receivers.

The MAX5544 is a serial-input, voltage-output, 14-bit monotonic digital-to-analog converter (DAC) that operates from a single +5V supply. The DAC output is unbuffered, resulting in low 0.3mA supply current and low 1LSB offset error. The DAC output range is 0V to VREF. The DAC latch accepts a 16-bit serial word. A power-on reset circuit clears the DAC output to 0V (unipolar mode) when power is initially applied. The 10MHz 3-wire serial interface is SPI™/QSPI™/MICROWIRE™ compatible and interfaces directly with optocouplers for applications requiring isolation. The MAX5544 is available in an 8-pin SO package. It is suitable for high-resolution offset and gain adjustment, industrial process control, automated test equipment, and data acquisition systems.

The MAX9125/MAX9126 quad low-voltage differential signaling (LVDS) line receivers are ideal for applica- tions requiring high data rates, low power, and reduced noise.

MAX9121/MAX9122 are four-channel low-voltage differential signaling (LVDS) differential line receivers ideal for applications requiring high data rates, low power, and low noise. The MAX9121/MAX9122 are guaranteed to receive data at speeds up to 500Mbps (250MHz) over controlled-impedance media of approximately 100Ω. The transmis-sion media may be printed circuit (PC) board traces or cables. The MAX9121/MAX9122 accept four LVDS differential inputs and translate them to LVCMOS outputs. The MAX9122 features integrated parallel termination resis-tors (nominally 107Ω), which eliminate the requirement for four discrete termination resistors and reduce stub lengths. The MAX9121 inputs are high impedance and require an external termination resistor when used in a point-to-point connection. The devices support a wide common-mode input range of 0.05V to 2.35V, allowing for ground potential differences and common-mode noise between the driver and the receiver. A fail-safe feature sets the output high when the inputs are open, or when the inputs are undriven and shorted or parallel terminated. The EN and EN inputs con-trol the high-impedance output. The enables are common to all four receivers. Inputs conform to the ANSI TIA/EIA-644 LVDS standard. Flow-through pinout simplifies PC board layout and reduces crosstalk by separating the LVDS inputs and LVCMOS outputs. The MAX9121/MAX9122 operate from a single +3.3V supply, and are specified for operation from -40°C to 85°C.

The MAX9129 is a quad bus low-voltage differential signaling (BLVDS) driver with flow-through pinout. This device is designed to drive a heavily loaded multipoint bus with controlled transition times (1ns 0% to 100% minimum) for reduced reflections. The MAX9129 accepts four LVTTL/LVCMOS input levels and translates them to output levels of 250mV to 450mV (standard LVDS levels) into a 27Ω load at speeds up to 200Mbps (100MHz). The power-on reset ensures that all four outputs are disabled and high impedance during power up and power down. The outputs can be set to high impedance by two enable inputs, EN and EN, thus dropping the device to a low-power state of 11mW. The enables are common to all four drivers. The flow-through pinout simplifies PC board layout and reduces crosstalk by keeping the LVTTL/LVCMOS inputs and BLVDS outputs separated. The MAX9129 operates from a single +3.3V supply and is specified for operation from -40°C to +85°C. It is available in 16-pin QFN and TSSOP packages. Refer to the MAX9121 data sheet for a quad LVDS line receiver with flow-through pinout.

The MAX9130 is a single low-voltage differential signaling (LVDS) line receiver ideal for applications requiring high data rates, low power, and low noise. The device is guaranteed to receive data at speeds up to 500Mbps (250MHz). The MAX9130 accepts an LVDS differential input and translates it to an LVTTL/LVCMOS output. The fail-safe feature sets the output high when the inputs are undriven and open, terminated, or shorted. The device supports a wide common-mode input range, allowing a ground potential difference and common-mode noise between the driver and the receiver. The MAX9130 conforms to the ANSI/TIA/EIA-644 LVDS standard. The MAX9130 operates from a single +3.3V supply, and is specified for operation from -40°C to +85°C. It is available in a space-saving 6-pin SC70 package. Refer to the MAX9110/MAX9112 data sheet for single/dual LVDS line drivers. Refer to the MAX9115 for a lower speed (200Mbps) single LVDS line receiver in SC70.

The MAX9156 is an LVPECL-to-LVDS level translator that accepts a single LVPECL input and translates it to a single LVDS output. It is ideal for interfacing between LVPECL and LVDS interfaces in systems that require minimum jitter, noise, power, and space. Ultra-low, 23psp-p added deterministic jitter and 0.6psRMS added random jitter ensure reliable communication in high-speed links that are highly sensitive to timing errors, especially those incorporating clock-and-data recovery, PLLs, serializers, or deserializers. The MAX9156’s switching performance guarantees a 200Mbps data rate, but minimizes radiated noise by guaranteeing 0.5ns minimum output transition time. The MAX9156 operates from a single +3.3V supply and consumes only 10mA supply current over a -40°C to +85°C temperature range. It is available in a tiny 6-pin SC70 package (half the size of a SOT23). Refer to the MAX9155 data sheet for a low-jitter, low-noise LVDS repeater in an SC70 package.