Analog Devices Manuals

This document is a datasheet for the ADF4154 fractional-N frequency synthesizer. It features an RF bandwidth of up to 4 GHz, a power supply range of 2.7 V to 3.3 V, and an extended tuning voltage capability. The product is suitable for applications such as mobile wireless base stations, wireless handsets, CATV equipment, and wireless LANs.

The ADF4193 is a low phase noise, fast settling PLL frequency synthesizer. It features a new, fast settling, fractional-N PLL architecture that replaces ping-pong synthesizers. Its key features include: frequency hopping across the GSM band in 5 µs with phase settled within 20 µs; 0.5° rms phase error at 2 GHz RF output; digitally programmable output phase; RF input range up to 3.5 GHz; 3-wire serial interface; on-chip, low noise differential amplifier; phase noise figure of merit: −216 dBc/Hz; qualified for automotive applications. Applications include GSM/EDGE base stations, PHS base stations, instrumentation and test equipment.

The ADF4156 is a 6.2 GHz fractional-N frequency synthesizer that implements local oscillators in mobile radio base stations, wireless handsets, wireless LANs, and communications test equipment.

The ADF4157 is a 6 GHz fractional-N frequency synthesizer with a 25-bit fixed modulus, allowing subhertz frequency resolution at 6 GHz. It features a wide RF bandwidth, programmable charge pump currents, and is suitable for applications such as satellite communications terminals, radar equipment, instrumentation equipment, and personal mobile radio (PMR).

ADF4350 is a wideband synthesizer with an integrated VCO. It features programmable fractional-N and integer-N synthesizers, low phase noise VCO, programmable prescaler, programmable output power level, etc.

This data sheet introduces the ADF4158, a 6.1 GHz, fractional-N frequency synthesizer with a 25-bit fixed modulus that allows subhertz frequency resolution, frequency and phase modulation capability, sawtooth and triangular waveforms in the frequency domain, parabolic ramp, superimposed FSK ramp, ramp with 2 different sweep rates, ramp delay, ramp frequency readback, ramp interruption, 2.7 V to 3.3 V power supply, separate VP allows extended tuning voltage, programmable charge pump currents, 3-wire serial interface, digital lock detect, power-down mode, cycle slip reduction for faster lock times, switched bandwidth fast-lock mode, qualified for automotive applications.

The ADF4150 is a Fractional-N/Integer-N PLL Synthesizer with features such as programmable divide-by-1/-2/-4/-8/-16 output, 5.0 GHz RF bandwidth, 3.0 V to 3.6 V power supply, and 1.8 V logic compatibility.

The ADF4196 frequency synthesizer can be used to implement local oscillators (LO) in the upconversion and downconversion sections of wireless receivers and transmitters. Its architecture is specifically designed for low phase noise, fast settling, and a 6 GHz PLL frequency synthesizer. It features fast settling, fractional-N PLL architecture, a single PLL that replaces ping-pong synthesizers, frequency hopping across the GSM band in 5 μs with phase settled within 20 μs, 1 degree rms phase error at 4 GHz RF output, digitally programmable output phase, RF input range up to 6 GHz, 3-wire serial interface, on-chip low noise differential amplifier, and a phase noise figure of merit of -216 dBc/Hz.

This document introduces the features of ADF4151, including frequency range, power supply, logic compatibility, pre-divider, RF output phase, serial interface, locking detection, switched bandwidth fast lock mode, cycle slip reduction and so on.

ADF4351 is a wideband frequency synthesizer with integrated VCO. It features programmable fractional-N and integer-N frequency synthesizers, low phase noise VCO, programmable prescaler, programmable output power level, etc. This product is suitable for wireless infrastructure, test equipment, wireless LANs, etc.

The ADF5001 is a low noise, low power, fixed RF divider that can divide frequencies as high as 18 GHz to a lower frequency suitable for input into a PLL IC, such as the ADF4156 or ADF4106. The ADF5001 provides a divide-by-4 function and operates off a 3.3 V supply with differential 100Ω RF outputs.

The ADF5002 is a low noise, low power, fixed RF divider block that can be used to divide down frequencies as high as 18 GHz to a lower frequency suitable for input to a PLL IC, such as the ADF4156 or the ADF4106.

The ADF5000 is a low-noise, low-power, fixed RF divider block that can be used to divide frequencies as high as 18 GHz by 2 to produce a lower frequency suitable for input to a PLL IC, such as the ADF4156 or the ADF4106.

ADCLK954 Rev. B is a low jitter clock fanout buffer, which features 2 selectable differential inputs, 12 LVPECL outputs, 4.8 GHz operating frequency, 75 fs rms broadband random jitter, and 3.3 V power supply.