This document introduces the features and characteristics of Blackfin Embedded Processor ADSP-BF539/ADSP-BF539F Rev. E product
The ADSP-BF539 and ADSP-BF539F are Blackfin family embedded processors offering up to 533 MHz performance, dual 16‑bit MACs, multiple ALUs, and a 40‑bit shifter. They integrate extensive on‑chip memory, a programmable voltage regulator, and a 316‑ball Pb‑free CSP‑BGA package, making them suitable for industrial and automotive applications.
The handbook details the processor’s architecture, memory hierarchy, and peripheral set, including CAN 2.0B, MXVR MOST transceiver, multiple UARTs, SPI, TWI, SPORT ports, timers with PWM, and GPIO. It also covers low‑power features, boot options, and package information.
| Maximum processor frequency | 533 MHz |
|---|---|
| On‑chip memory total | 148 KB |
| Instruction SRAM/cache | 16 KB |
| Instruction SRAM | 64 KB |
| Data SRAM | 32 KB |
| Data SRAM/cache | 32 KB |
| Scratchpad SRAM | 4 KB |
| Number of UARTs | 3 |
| Number of CAN controllers | 1 (CAN 2.0B) |
| Number of timers with PWM | 3 |
| Package type | 316‑ball Pb‑free CSP_BGA |
| On‑chip voltage regulator | Programmable |
The processors can run at up to 533 MHz.
They provide 148 KB of on‑chip memory, including instruction SRAM/cache, instruction SRAM, data SRAM, data SRAM/cache, and a 4 KB scratchpad SRAM.
The device includes a CAN 2.0B controller and a MOST network media transceiver (MXVR).
It is supplied in a 316‑ball Pb‑free CSP_BGA package.