Analog Devices ADSP-2181 IDMA Port Cycle Steal Timing Application Note

This EE-Note will give an explanation of how long an idma access will take under varying conditions

Brand: Analog Devices
Document type: Application Note
Language: English
Pages: 1
File format: PDF
File size: 75 KB
Published: 03 August, 2012
Updated: 30 September, 2023
Model: ADSP-2181
MD5 checksum: 95FF1618EABAE83BAC3D1475D12EE167
PDF: Analog Devices ADSP-2181 IDMA Port Cycle Steal Timing Application Note PDF

About this manual

This document is an Engineer To Engineer (EE) Note titled EE-38, providing technical details on using Analog Devices' DSP components from their Computer Products Division. It specifically addresses the timing characteristics of the IDMA (Internal DMA) port on the ADSP-2181 processor.

What's inside

IDMA Port Cycle Steal Timing
Cycle Variables IDEL and ODEL
Wait State Variable W
Timing for Internal Instructions
Timing for External Instructions
BDMA Access Timing
Autobuffer Access Timing
Bus Request Conditions
Slowidle(n) Conditions

Specifications

Processor Family	DSP, audio, & video components
Document Type	Engineer To Engineer Note

Frequently asked questions

What is the best case time for an IDMA access with no external accesses?

The best case time is IDEL + 2.5TCLK + ODEL.

What is the worst case time for an IDMA access with no external accesses?

The worst case time is IDEL + 3.5TCLK + ODEL.

What happens to the timing if the bus is granted and hung?

The worst case time becomes infinite, as it depends on when the bus grant deasserts.

Download PDF (75 KB)