Analog Devices ADSP-21160 SHARC Processors Implementing Overlays EE-284

Introduces the implementation of software overlays on ADSP-21160 SHARC® processors


Analog Devices ADSP-21160 SHARC Processors Implementing Overlays EE-284 - cover page
Brand
Analog Devices
Category
Other Electronics
Document type
Application Note
Language
English
Pages
8
File format
PDF
File size
324 KB
Published
03 August, 2012
Updated
30 September, 2023
MD5 checksum
FDFAB31ADC7422FEADE8E0BAB6157A61

About this manual

This document discusses the implementation of software overlays on ADSP-21160 SHARC processors, which are used when a processor lacks sufficient internal memory for all application data and code. It describes the external memory packing of the ADSP-21160 and demonstrates the software overlay technique using example code on the ADSP-21160 EZ-KIT Lite board. The note also references previous documentation on using memory overlays with SHARC processors.

What's inside

  • Introduction
  • Overlays on SHARC Processors
  • Overlays on ADSP-21160 SHARC Processors
  • Packing Method in Visual DSP++
  • VisualDSP++ Support
  • Overlay Manager with DMA No Packing - Example
  • Linker Definitions
  • Overlay Manager with DMA Without Packing

Frequently asked questions

What is the purpose of overlays on ADSP-21160 SHARC processors?

Overlays are used when a processor does not have sufficient internal memory to hold all of the application's data and/or program code.

How is overlay code transferred from external memory to internal memory?

The code responsible for transferring the data/program code from external memory to internal memory at runtime is called an overlay manager.

What packing mode must be used with the actual ADSP-21160 device?

Use the following packing mode with the actual device: PACKING (12 B3 B4 B5 B6 B0 B11 B12 B1 B2 B0 B7 B8 B9 B10 B0).

Download PDF (324 KB)

More Analog Devices Manuals


View all Analog Devices manuals →