Analog Devices Estimating Optimizing Booting Time for Blackfin Processors EE-308

About this manual

This Engineer-to-Engineer Note (EE-308) describes the methodology for estimating, measuring, and optimizing the booting time of Blackfin processor-based systems. It focuses on the two most common boot modes: booting from flash and booting from SPI serial EEPROM master mode. The document details the components of boot time, including Boot ROM execution, data loading, zero-filling, and initialization code execution.

What's inside

• Introduction
• Booting Time Definition
• Booting Process
• Loader File Structure
• Measurement of Boot Time
• Estimating Boot Time
• Equations for Estimation

Frequently asked questions

What is the definition of boot time for this processor?

Booting time is defined as the interval between deasserting the /RESET pin and executing the first line of application code.

What are the four supported boot modes?

The processor supports booting from external memory, flash, SPI slave mode, or SPI serial EEPROM master mode.

What is the address where the loader image begins in L1 memory?

The boot ROM loads code to the beginning of L1 memory at address 0xFFA00000.