This document introduces the interface between Analog Devices ADSP-BF53x Blackfin® processors and NAND FLASH memory
This Engineer-to-Engineer Note describes methods for interfacing both Single-Level-Cell (SLC) and Multi-Level-Cell (MLC) NAND flash memories to the ADSP-BF53x Blackfin processor family. The document highlights that while Blackfin processors lack an on-chip NAND controller, they can access these high-density memory devices via software drivers using either General-Purpose I/O pins or the External Bus Interface Unit (EBIU).
| Storage Capacity (SLC) | 8 to 512 MB |
|---|---|
| Program Time (Samsung K9F2G08U0M) | 200 µs per page |
| Erase Time (Samsung K9F2G08U0M) | 2 ms per block |
| Read Time (Samsung K9F2G08U0M) | 30 ns per byte |
The document discusses Single-Level-Cell (SLC) and Multi-Level-Cell (MLC) devices.
Two approaches are available: using GPIO pins or using the External Bus Interface Unit (EBIU).
One page in the K9F2G08U0M consists of 2112 bytes.