AD9550 is a digital clock translator from Analog Devices that supports input frequencies from 8kHz to 200MHz and output frequencies up to 810MHz. AD9550 provides two independent programmable output clocks that can be configured as LVDS, LVPECL or CMOS logic levels. AD9550 operates at 3.3V and consumes only 450mW.
The AD9550 is an integer-N phase-locked loop (PLL) based clock translator designed for wireline communications and base station applications. It accepts a single-ended input reference signal and provides programmable output frequencies up to 810 MHz in LVPECL, LVDS, or CMOS formats. The device is pin-programmable to select from a matrix of standard input/output frequency translations.
| Supply Voltage | 3.135 V to 3.465 V |
|---|---|
| Power Consumption (Total) | 162 mA (typical) |
| Output Frequency Range | 0 to 810 MHz |
| Input Frequency Range | 8 kHz to 200 MHz |
| Operating Temperature Range | -40°C to +85°C |
| VCO Frequency Range | 3350 MHz to 4050 MHz |
| Package Size | 5 mm × 5 mm |
The device supports LVPECL, LVDS, and single-ended CMOS logic levels.
The maximum output frequency is 810 MHz.
Yes, the AD9550 includes an on-chip VCO.