Analog Devices AD9516-5 14-Output Clock Generator Datasheet

AD9516-5 Clock Generator is a low phase noise, phase-locked loop (PLL) that provides six 1.6 GHz LVPECL outputs and four 800 MHz LVDS outputs. It features one differential or two single-ended reference inputs, and accepts LVPECL, LVDS, or CMOS references up to 250 MHz. The AD9516-5 also offers programmable delays and digital or analog lock detect.


Analog Devices AD9516-5 14-Output Clock Generator Datasheet - cover page
Brand
Analog Devices
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
76
File format
PDF
File size
1.1 MB
Published
02 August, 2012
Updated
30 September, 2023
Model
AD9516
MD5 checksum
8B770B3A1DEECCBEA5371F2D9BF981D3

About this manual

The AD9516-5 is a 14-output clock generator designed for low jitter and phase noise applications. It features six LVPECL outputs operating up to 1.6 GHz and four LVDS outputs operating up to 800 MHz, with the LVDS outputs also configurable as CMOS outputs. The device includes an on-chip phase-locked loop (PLL) that can be used with an external voltage-controlled oscillator (VCO) or voltage-controlled crystal oscillator (VCXO) with frequencies up to 2.4 GHz.

What's inside

  • Features
  • Applications
  • Specifications
  • Power Supply Requirements
  • PLL Characteristics
  • Clock Inputs
  • Clock Outputs
  • Serial Control Port
  • Pin Configuration
  • Register Maps

Specifications

Supply Voltage (VS)3.135 V to 3.465 V
LVPECL Output FrequencyUp to 1.6 GHz
LVDS Output FrequencyUp to 800 MHz
CMOS Output FrequencyUp to 250 MHz
Reference Input FrequencyUp to 250 MHz
Operating Temperature Range-40°C to +85°C
Package Type64-lead LFCSP

Frequently asked questions

Can the LVDS outputs be used as CMOS outputs?

Yes, each LVDS output can be reconfigured as two 250 MHz CMOS outputs.

What reference input frequencies are supported?

The device accepts LVPECL, LVDS, or CMOS references up to 250 MHz.

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