Altera Stratix II Hot Socketing and Power-On Reset Guide

About this manual

The text describes the hot socketing feature of Stratix II devices, which allows insertion or removal during system operation without external components. Key benefits include support for any power-up sequence and non-intrusive I/O buffers that prevent bus contention.

The document also covers the Power-On Reset (POR) circuitry, explaining how it keeps the device in reset until voltage levels stabilize. It specifies maximum VCC rise times of 100 ms and details how the PORSEL pin can adjust this delay to either 12 ms or 100 ms.

What's inside

• Hot Socketing Specifications
• Power-On Reset Circuitry
• Board Insertion and Removal
• Latch-up Immunity
• Output Buffer Control
• Signal Integrity
• VCC Rise Time Requirements

Specifications

Frequently asked questions

Can Stratix II devices be driven before power-up?

Yes, signals can be driven into I/O pins and dedicated clock pins before or during power-up without damaging the device.

How does the PORSEL pin affect power-on reset time?

Connecting PORSEL to ground sets the delay to 100 ms, while connecting it to VCC sets the delay to 12 ms.