This document is a handbook on the interfaces and integration of Altera's Arria II devices. The handbook describes the features and characteristics of the Arria II devices.
The Arria II Device Handbook Volume 1 provides comprehensive technical information on the architecture and features of the Arria II device family. It details the device core components including Logic Array Blocks (LABs), Adaptive Logic Modules (ALMs), Embedded Memory Blocks, and DSP Resources.
The document also covers high-speed transceiver features, PCIe hard IP blocks, I/O standards such as LVDS and DPA, clock management networks, and Phase-Locked Loop (PLL) hardware implementation. It serves as a reference for designers integrating these devices into their systems.
| Document Publication Date | July 2012 |
|---|---|
| Design Suite Version | Altera Complete Design Suite version 12.0 |
This handbook covers device interfaces and integration for the Arria II device family.
The document was last updated for Altera Complete Design Suite version 12.0.
The document publication date is July 2012.