This white paper provides benchmarking data showing that Altera Stratix IV FPGAs have increased functionality, higher processing performance, and lower power consumption compared to Virtex-5 FPGAs.
This document is a white paper comparing the architecture and performance of Altera's 40-nm Stratix IV FPGAs against competing Virtex-5 FPGAs. It details how the Stratix IV devices achieve higher processing performance and lower power consumption through specific architectural innovations like Programmable Power Technology and the MultiTrack interconnect architecture. The paper claims that Stratix IV FPGAs are 35 percent faster than Virtex-5 FPGAs on average.
| Maximum internal clock speed | 600 MHz |
|---|---|
| MLAB clock rate | 600 MHz |
| DDR3 interface speed | 533 MHz |
| LVDS data rate | 1.6 Gbps |
| Transceiver data rate | 8.5 Gbps |
| Logic Elements | up to 680,000 |
The slow speed grade of Stratix IV FPGAs is 41% faster than the nearest competitor's slow speed grade and 9% faster than the competitor's fast speed grade.
The Stratix IV GX transceiver block implements protocols operating at data rates up to 8.5 Gbps.
Stratix IV FPGAs consume 165 mW per channel at a data rate of 8.5 Gbps.