Altera Arria II Device Handbook Volume 1: Device Interfaces and Integration

About this manual

The document serves as a comprehensive technical reference for the Altera Arria II device family. It details the architecture of the Logic Array Blocks (LAB) and Adaptive Logic Modules (ALM), explaining their operating modes such as Normal, Extended LUT, Arithmetic, and Shared Arithmetic modes.

Additionally, the handbook provides in-depth information on embedded memory blocks, including various RAM, ROM, FIFO, and shift-register configurations. It also covers DSP block resources with descriptions of multipliers, adders, and operational modes like Multiply Accumulate. The text further explores clock networks, PLL hardware, control signals, and reconfiguration capabilities essential for FPGA design.

What's inside

• Device Core for Arria II Devices
• Logic Array Blocks and Adaptive Logic Modules
• Memory Blocks in Arria II Devices
• DSP Blocks in Arria II Devices
• Clock Networks and PLLs in Arria II Devices

Frequently asked questions

What is the document publication date?

The document was published in July 2012.

Which version of the design suite does this handbook cover?

This handbook covers Altera Complete Design Suite version 12.0.