This is the Altera Stratix II Device Handbook Volume 1, which introduces the basic information of the device
The Stratix II Device Handbook, Volume 1 serves as a technical reference for the Stratix II family of FPGAs. It details the device architecture, including Logic Array Blocks (LABs), Adaptive Logic Modules (ALMs), TriMatrix Memory, and Digital Signal Processing blocks.
The document also covers configuration methods such as JTAG boundary-scan, SignalTap II embedded logic analyzer usage, and hot-socketing specifications. Additionally, it provides extensive DC and switching characteristics, timing parameters, I/O standard specifications, and ordering information.
| VCCINT Supply Voltage | 1.2-V power supply |
|---|---|
| I/O Pin Tolerance (VCCINT=1.2V) | 1.5-, 1.8-, 2.5-, and 3.3-V tolerant |
| VCCPD Supply Voltage | 3.3-V power supply |
The VCCINT pins must always be connected to a 1.2-V power supply.
Yes, with a 1.2-V VCCINT level, input pins are tolerant of 1.5-, 1.8-, 2.5-, and 3.3-V levels.