PHILIPS 74F1763 handbook

This document describes the features and functions of the Philips Semiconductors 74F1763 Intelligent DRAM Controller (IDC), including DRAM signal timing generator, automatic refresh circuitry, selectable row address hold and RAS precharge times, etc. The controller is designed for controlling 1 MBit DRAMs and supports intelligent burst-mode refresh after page-mode access cycles. The document also introduces some improved features of the product, such as page-mode access, selectable RAS precharge time, and row-address hold time to fit different DRAMs.


Brand
Philips
File format
PDF
Published
06 July, 2012
Updated
28 September, 2023
MD5 checksum
07BC4CB0B39A454A0AB640643119E740
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