National Semiconductor LMC568 Low Power Phase-Locked Loop Datasheet

LMC568 is a low power Phase-Locked Loop chip produced by National Semiconductor Corporation. It supports ±15% FM and FSK signal demodulation, with a maximum input frequency of 500kHz. Typical application scenarios include FM SCA and TV second audio program decoders, FSK data demodulators and voice pagers.


National Semiconductor LMC568 Low Power Phase-Locked Loop Datasheet - cover page
Brand
National Semiconductor
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
6
File format
PDF
File size
163 KB
Published
06 July, 2012
Updated
01 October, 2023
MD5 checksum
A73A89DFEA008700C12FF5E3ACD1DA5B

About this manual

The LMC568 is an amplitude-linear phase-locked loop utilizing LMCMOS technology for high performance and low power consumption. It consists of a linear voltage-controlled oscillator (VCO), fully balanced phase detectors, and a carrier detect output. The device is designed to demodulate FM and FSK signals with a VCO linearized control range of ±30%.

What's inside

  • General Description
  • Absolute Maximum Ratings
  • Electrical Characteristics
  • Typical Application Circuit
  • Test Circuit
  • Physical Dimensions

Specifications

Supply Voltage Range2V to 9V
Operating Temperature Range-25°C to +125°C
Input Frequency500 kHz
Total Harmonic Distortion0.5 % typ.
Power Supply Current (Typical)0.75 mA (5V)
Output Leakage Current100 nA
Center Frequency (Typical)90 kHz to 115 kHz (5V)
Package TypesM08A (Dual-In-Line), N08E (Small Outline)

Frequently asked questions

What is the supply voltage range for the LMC568?

The device operates with a supply voltage range of 2V to 9V.

What are the applications for the LMC568?

Applications include FM SCA and TV second audio program decoders, FSK data demodulators, and voice pagers.

What is the typical Total Harmonic Distortion (THD)?

The typical THD is 0.5% for ±10% deviation.

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