The DS21372 Bit Error Rate Tester (BERT) is a software programmable test pattern generator, receiver, and analyzer capable of meeting the most stringent error performance requirements of digital transmission facilities.
The DS21372 Bit Error Rate Tester (BERT) is a software programmable test pattern generator, receiver, and analyzer designed for digital transmission facilities. It operates at clock rates ranging from DC to 20 MHz and conforms to CCITT/ITU standards for test pattern generation.
The device consists of four functional blocks: the pattern generator, pattern detector, error counter, and control interface. It can generate pseudorandom patterns up to 32 bits in length or user-defined repetitive patterns. The DS21372 also features the ability to insert single or multiple bit errors to verify equipment operation and connectivity.
| Operating Speed | DC to 20 MHz |
|---|---|
| Supply Voltage | 3.3 volts |
| Package Type | 32-PIN TQFP |
| Pattern Length | up to 32 bits |
The device operates at clock rates ranging from DC to 20 MHz.
The device can generate any user-defined pattern up to 32 bits in length.
The device features large 32-bit error count and bit count registers.