CD54AC280, CD54ACT280 are 9-bit odd/even parity generator/checkers that utilize Advanced CMOS Logic technology. Both even and odd parity outputs are available for checking or generating parity for words up to nine bits long. Even par- ity is indicated (∑E output is HIGH) when an even number of data inputs is HIGH. Odd parity is indicated (∑O output is HIGH) when an odd number of data inputs is HIGH. Parity checking for words larger than nine bits can be accom- plished by tying the ∑E output to any input of an additional 'AC280, 'ACT280 parity checker.
The CD54/74AC280 and CD54/74ACT280 are 9-bit odd/even parity generator/checkers that utilize Advanced CMOS Logic technology. These devices provide both even and odd parity outputs to check or generate parity for words up to nine bits long. Parity checking for words larger than nine bits can be accomplished by tying the YE output to any input of an additional parity checker.
| Propagation Delay (Typical) | 10ns |
|---|---|
| ESD Protection | 2kV |
| Output Drive Current | +24mA |
| Supply Voltage Range (AC Types) | 1.5V to 5.5V |
| Supply Voltage Range (ACT Types) | 4.5V to 5.5V |
| Number of Bits | 9-bit |
The typical propagation delay is 10ns at Voc = 5V, Ta = 25°C, and CL = 50pF.
Yes, by tying the YE output to any input of an additional AC280 or ACT280 parity checker.