Harris Semiconductor SCHS250A is a 9-bit odd/even parity generator/checker that utilizes Advanced CMOS Logic technology. It features balanced propagation delays, high speed, and reduced power consumption. It can be used to check or generate odd/even parity for words up to nine bits long. Even parity is indicated when an even number of data inputs is HIGH, and odd parity is indicated when an odd number of data inputs is HIGH.
The CD54/74AC280 and CD54/74ACT280 are 9-bit odd/even parity generator/checkers that utilize Advanced CMOS Logic technology. Both even and odd parity outputs are available for checking or generating parity for words up to nine bits long. Even parity is indicated when an even number of data inputs is HIGH, while odd parity is indicated when an odd number of data inputs is HIGH.
| Bit Width | 9-bit |
|---|---|
| Typical Propagation Delay | 10ns |
| Output Drive Current | +24mA |
| Fanout | 15 FAST™ ICs |
| ESD Protection | 2kV |
It is a 9-bit odd/even parity generator/checker that utilizes Advanced CMOS Logic technology.
Even parity is indicated when the CE output is HIGH, which occurs when an even number of data inputs is HIGH.
Odd parity is indicated when the LO output is HIGH, which occurs when an odd number of data inputs is HIGH.