This document describes the features and characteristics of the 74HC/HCT03 quad 2-input NAND gate, including level shift capability, output capability, and current consumption. The product is a high-speed Si-gate CMOS device, pin compatible with low power Schottky TTL. It can be used as a level shifter for low-to-high or high-to-low transitions, and requires a pull-up resistor for digital operation and OR-tied output applications.
This document is a product specification datasheet for the Philips 74HC/HCT03, a high-speed Si-gate CMOS device featuring a Quad 2-input NAND gate function. The device is pin compatible with low power Schottky TTL (LSTTL) and is specified in compliance with JEDEC standard no. 7A.
The datasheet provides detailed technical information including features, quick reference data, pin descriptions, functional tables, and absolute maximum ratings. It covers DC and AC characteristics for both HC and HCT variants, along with application information regarding pull-up configurations and test circuits.
| Output capability | standard (open drain) |
|---|---|
| Logic category | SSI |
| Input capacitance | 3.5 pF |
| DC supply voltage (max) | 4.7 V |
| DC output sink current | 25 mA |
| Storage temperature range | -65 to +150 °C |
| Maximum operating output voltage | 6.0 V |
No, the open-drain N-transistor outputs are not clamped by a diode connected to Vcc.
The maximum DC output sink current is 25 mA when the output voltage is between -0.5 V and Vcc.