This document describes the features and characteristics of the 74HC/HCT02 quad 2-input NOR gate.
The document is a product specification for the 74HC/HCT02, a high-speed Si-gate CMOS device that is pin compatible with low power Schottky TTL (LSTTL). It provides the 2-input NOR function and is specified in compliance with JEDEC standard no. 7A.
The datasheet includes quick reference data for propagation delay and input capacitance, ordering information, pin descriptions, a functional table, and AC characteristics for both 74HC and 74HCT variants under various temperature conditions.
| Propagation delay (typical) | 7 ns |
|---|---|
| Input capacitance | 3.5 pF |
| Power dissipation capacitance per gate | 22 pF |
| Logic category | SSI |
| Output capability | standard |
The 74HC/HCT02 provide the 2-input NOR function.
The maximum propagation delay is 24 ns.
The unit load coefficient for the inputs is 1.50.