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This document is a datasheet for the SN54167 and SN74167 synchronous decade rate multipliers. These monolithic, fully synchronous, programmable counters utilize Series 54/74 TTL circuitry to achieve a typical maximum operating frequency of 32 MHz. They feature buffered clock, clear, enable logic, and set-to-nine inputs to control the operation of the counter, along with a strobe input to enable or inhibit the rate input/decoding gates.