Intersil 82C52 Single Chip UART/BRG Datasheet

The 82C52 is a single-chip high-performance programmable Universal Asynchronous Receiver/Transmitter (UART) and Baud Rate Generator (BRG) from Intersil Corporation. It uses Intersil Corporation's advanced Scaled SAJI IV CMOS process, supporting data rates up to 1M baud asynchronously with a 16X clock (16MHz clock frequency). The on-chip Baud Rate Generator can be programmed for any one of 72 different baud rates using a single industry standard crystal or external frequency source. When using any one of three industry standard crystals (1.8432MHz, 2.4576MHz or 3.072MHz), a unique pre-scale divide circuit can be designed to provide standard RS-232-C baud rates. A programmable buffered clock output (CO) is available and can be programmed to provide either a buffered oscillator or 16MHz digital clock output.


Intersil 82C52 Single Chip UART/BRG Datasheet - cover page
Brand
Intersil
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
19
File format
PDF
File size
260 KB
Published
12 June, 2012
Updated
30 September, 2023
Model
82C52
MD5 checksum
F1EE8D9D8EDB7119EDB89D8EDE606DEF

About this manual

The Intersil 82C52 is a single-chip CMOS Serial Controller Interface designed as a high-performance Universal Asynchronous Receiver/Transmitter (UART) and Baud Rate Generator. It supports data rates up to 1 Mbaud asynchronously with a 16 MHz clock frequency.

What's inside

  • Features
  • Block Diagram
  • Pin Description
  • Reset
  • Programming
  • UART Control Register (UCR)
  • Ordering Information

Specifications

Data RateDC to 16MHz (1M Baud)
Power Supply+5V

Frequently asked questions

What is the maximum data rate supported by the 82C52?

The device supports data rates up to 1M baud asynchronously with a 16X clock.

What is the recommended power supply voltage for the 82C52?

The device operates with a single +5V power supply.

How many clock cycles must the RST input be held high during power-up?

The Reset Input must be held high for at least two IX clock cycles to initialize the circuits.

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