The DM7474 is a dual positive-edge-triggered D-type flip-flop with preset, clear, and complementary outputs. It contains two independent positive-edge-triggered D-type flip-flops with complementary outputs. The information on the D input is accepted by the flip-flops on the positive going edge of the clock pulse. The triggering occurs at a voltage level and is not directly related to the transition time of the rising edge of the clock. The data on the D input may be changed while the clock is LOW or HIGH without affecting the outputs as long as the data setup and hold times are not violated. A LOW logic level on the preset or clear inputs will set or reset the outputs regardless of the logic levels of the other inputs. The document also provides a connection diagram and a function table.
The DM7474 contains two independent positive-edge-triggered D-type flip-flops with complementary outputs. Data on the D input is accepted on the positive-going edge of the clock pulse. The device features preset and clear inputs to set or reset the outputs regardless of other input logic levels.
The document provides absolute maximum ratings, recommended operating conditions, and electrical characteristics including input/output voltages, currents, and propagation delays. It also details physical dimensions for the available 14-Lead SOIC (M14A) and 14-Lead PDIP (N14A) packages.
A LOW logic level on the preset or clear inputs will set or reset the outputs regardless of the logic levels of the other inputs.
The information on the D input is accepted by the flip-flops on the positive going edge of the clock pulse.