The GS832218/36/72 is a high-performance synchronous SRAM with a 2-bit burst address counter. Originally developed for Level 2 Cache applications supporting high-performance CPUs, the device now finds application in synchronous SRAM applications, ranging from DSP main store to networking chip set support. It has various features, such as user-configurable flow through or pipeline operation, single/dual cycle deselect selectable, IEEE 1149.1 JTAG-compatible Boundary Scan support, etc.
