GSI Manuals

GS816018/32/36BT-250/200/150 is a high performance synchronous SRAM with a 2-bit burst address counter, developed by GSI Technology for Level 2 Cache applications supporting high performance CPUs. It is now widely used in synchronous SRAM applications, including DSP main store and networking chip set support. The device has a 2.5 V or 3.3 V +10%/–10% core power supply, a 2.5 V or 3.3 V I/O power supply, Byte Write (BW) and/or Global Write (GW) operation, internal self-timed write cycle and automatic power-down function.

The GS84018/32/36AT/B-190/180/166/150/100 is a 4Mb synchronous burst SRAM from GSI Technology. It operates at a frequency of 190 MHz–100 MHz, with a core power supply of 3.3 V VDD and I/O power supplies of 3.3 V and 2.5 V. It is available in TQFP and BGA packages.

GS840Z18/36AT-180/166/150/100 is a 4Mb Synchronous Static SRAM from GSI Technology that supports No Bus Turn Around for zero wait read-write-read bus utilization.

GSI Technology 4Mb Pipelined and Flow Through Synchronous NBT SRAMs are available in 256K x 18 and 128K x 36 configurations. They feature user configurable Pipeline and Flow Through mode, NBT (No Bus Turn Around) functionality, and fully pin compatibility with both pipelined and flow through NtRAM™, NoBL™ and ZBT™ SRAMs.

This document contains information about the features and characteristics of a certain product, as well as related user guides and specifications.

The GS88237BB/D is a 9Mb SCD/DCD synchronous burst SRAM with a storage capacity of 256K x 36. It operates at frequencies ranging from 333 MHz to 200 MHz and supports voltage supplies of 2.5 V or 3.3 V. It features single/dual cycle deselect, IEEE 1149.1-compatible boundary scan, selectable high/low output drive mode, linear or interleaved burst mode, automatic power-down, and more.

The GS8320EV18/32/36T is a 37,748,736-bit high performance synchronous SRAM with a 2-bit burst address counter, which can be used in DSP main store, network chip set support and other applications.

GS72108TP/J 256K x 8 2Mb Asynchronous SRAM 8, 10, 12, 15 ns 3.3 V VDD Center VDD and VSS SOJ, TSOP Commercial Temp Industrial Temp, fast access time, CMOS low power operation, single 3.3 V ± 0.3 V power supply, all inputs and outputs are TTL-compatible

This datasheet is for GS88237BB/D-xxxV 256K x 36 9Mb SCD/DCD Sync Burst SRAM. It provides the main features of the product, such as operating voltage, operating temperature, and package type.

The GS882ZV18/36B is a 9Mb Synchronous Static SRAM. GSI's NBT SRAMs, like ZBT, NtRAM, NoBL or other pipelined read/double late write or flow through read/single late write SRAMs, allow utilization of all available chip selects, thereby achieving zero wait read-write-read bus utilization. The product is powered by 1.8V VDD and 1.8V I/O, features a user-configurable pipeline and flow-through mode, ZQ mode pin, IEEE 1149.1 JTAG-compatible Boundary Scan, on-chip parity encoding and error detection, LBO pin for linear or interleave burst mode, pin-compatibility with 2M, 4M, and 18M devices, byte write operation (9-bit Bytes), 3 chip enable signals for easy depth expansion, ZZ pin for automatic power-down, JEDEC-standard 119-bump BGA and 165-bump FPBGA packages, lead-free 119-bump and 165-bump BGA packages available.

This datasheet provides additional information for the GS816118/32/36D, including a new 165-bump BGA package and an x32 organization

GS832018/32/36T-250/225/200/166/150/133 is a high performance synchronous SRAM chip produced by GSI Technology. It supports 2.5V or 3.3V VDD voltage and 2.5V or 3.3V I/O voltage. It supports 100-Pin TQFP package.

GS8320Z18/36T is a 36Mbit Synchronous Static SRAM. GSI's NBT SRAMs, like ZBT, NtRAM, NoBL or other pipelined read/double late write or flow through read/single late write SRAMs, allow utilization of all available bus bandwidth by eliminating the need to insert deselect cycles when the device is switched from read to write cycles. Because it is a synchronous device, address, data inputs, and read/ write control inputs are captured on the rising edge of the input clock. Burst order control (

The GS74104 is a high speed CMOS Static RAM organized as 1,048,576 words by 4 bits. It features 8, 10, 12, 15 ns fast access time, 150/125/110/90 mA low power consumption, single 3.3 V ± 0.3 V power supply, TTL-compatible all inputs and outputs, fully static operation, and an industrial temperature option of -40° to 85°C.

This document describes the features and characteristics of GS881Z18B(T/D)/GS881Z32B(T/D)/GS881Z36B(T/D) 9Mb Pipelined and Flow Through Synchronous NBT SRAM, including user-configurable Pipeline and Flow Through mode, NBT functionality, compatibility with other SRAMs, JTAG compatibility, on-chip write parity checking, power supply and interface options, etc.