The PI7C8154B is a 2-port, 64-bit/66MHz PCI-to-PCI bridge with various features and functionalities. It complies with the PCI Local Bus Specification, supports both 3.3V and 5V signaling environments, and enables concurrent primary and secondary bus operations. It also includes a programmable internal arbiter for the secondary bus with support for up to 9 external masters, IEEE 1149.1 JTAG port for boundary scan testing, and other features such as serial EEPROM support and asynchronous mode operation.
This document is a technical datasheet for the Pericom PI7C8154B, a 2-port, 64-bit/66MHz PCI-to-PCI bridge. It details the device's features, including compliance with PCI Local Bus Specification Revision 2.2 and support for both 3.3V and 5V signaling environments.
| Interfaces | PCI Local Bus Specification Revision 2.2 |
|---|---|
| Signaling Environments | 3.3V and 5V |
| Memory Buffer Architecture | Dynamic Prefetching Control |
| Upstream posted write buffer | 512 bytes |
| Downstream read data buffer | 1024 bytes |
| Bus Arbitration | Programmable internal arbiter for the secondary bus with support for up to 9 external masters |
| Vendor ID | 12D8h |
| Device ID | 8154h |
Yes, it supports both 3.3V and 5V signaling environments.
The upstream posted write buffer size is 512 bytes.
Yes, it supports dynamic prefetching control.